1. Field of the Invention
The present invention relates to a data transformation apparatus and the method thereof, especially to a data transformation apparatus and the method thereof for transforming data block.
2. Description of the Prior Art
For data processing or transmission, to reduce electromagnetic interference (EMI) and to achieve direct current (DC) balance have always been an important subject of research. If EMI is too high, the electronic signals of other circuits will be interfered, thus generating noise. In some digital transmission systems, two symbols are usually transmitted directly to represent logic 0 and logic 1, and they are also usually represented by the high and low of the voltage. To restrain EMI, the transitions between logic 0 and logic 1 should not be too frequent. DC balance can enable the total potential of the electronic signals to be maintained at the level of about zero, thus generating a steady reference voltage.
Referring to FIG. 1, FIG. 1 is a schematic diagram of the transformation apparatus 12 of the byte 10 of the prior art. U.S. Pat. No. 5,825,824 disclosed a transformation apparatus 12 of a byte 10 of the prior art for transforming the byte 10 to generate a data block 14 that conforms to low transition frequency and DC balance. The transformation apparatus 12 comprises a first processing module 16 and a second processing module 18. The first processing module 16 is used for calculating a transition frequency of two consecutive bits in the byte 10. According to the transition frequency and a predetermined standard value, the first processing module 16 further determines whether the conditional alternate bit inversion (CABI) calculation should be performed on the byte 10. The so-called CABI calculation is used for inverting the bits with even numbers in the byte 10. Whether the CABI calculation is performed on the byte 10 or not, the byte 10 is outputted to be a medium byte 20 and generate a transition bit 22.
The second processing module 18 is used for calculating the difference between the number of 1 and the number of 0 within the medium byte 20 to generate a number difference. According to the number difference and a difference accumulating value, the second processing module 18 further determines whether the conditional byte inversion (CTBI) should be performed on the medium byte 20. The so-called CTBI calculation is used for inverting all of the bits in the medium byte 20. Whether the CTBI calculation is performed or not, the medium byte 20 is outputted to be an output byte 24 and generate a mark bit 26. Before the output byte 24 is generated, the second processing module 18 calculates the difference between the number of 1 and the number of 0 within the output byte 24 in advance to generate a corresponding number difference, and then it sums up the corresponding number difference and the difference accumulating value to be the next difference accumulating value.
Then, the transition bit 22, the mark bit 26, and the output byte 24 are constructed to be the data block 14.
However, when the first processing module 16 calculates the transition frequency, and the second processing module 18 calculates the number difference, the influence of the transition bit 22 and the mark bit 26 is not being considered, thus resulting in the final data block 14 also comprising the transition bit 22 and the mark bit 26. As a result, the first processing module cannot make the best decision to determine whether the CABI calculation should be performed, and the second processing module 18 also cannot make the best decision to determine whether the CTBI calculation should be performed. Thus, the data block 14 generated by the transformation apparatus 12 cannot achieve the lowest transition and best DC balance.